| Post Name | Maintenance Engineer (Electronics) - Kerala State Film Development Corporation Ltd |
|---|---|
| Question Paper Code | 083/2023/OL |
| Category Code | 129/2020 |
| Date of Test | 14 June 2023 |
| Exam Type | Online Examination |
| Total Questions | 100 |
1
What makes up the total current in a semiconductor ?
Answer
A. Drift and diffusion current
2
What makes changes in a load current in a zener voltage regulator ?
Answer
A. Zener current
3
Reason for drift current
Answer
A. Applied electric field
4
What is the diffusion capacitance in a diode with an applied voltage of 2 volts and charge in minority carriers outside the depletion region is ?
Answer
A. 6.5 nF
5
An applied voltage of 10 volt and a resistance 1K-ohm is used with an approximate equivalent model of a silicon diode. Find the value of diode current at operating point.
Answer
C. 9.3 mA
6
What is the output voltage in a positive clipper if the input voltage is higher than reference voltage ?
Answer
B. Output voltage = Reference voltage
7
What is the minimum input voltage required to switch the transistor into saturation when V_CC = 12 V, R_B = 15 kΩ, R_C = 6.8 kΩ, h_fe = 25 and V_CE = 0.2 V?
Answer
A. 1.74 V
8
What is the device constant of an enhancement type in channel MOSFET with the drain current ?
Answer
D. 0.102 mA/
9
What is the bandwidth of an Op Amp band pass filter, if the lower and higher cut off frequencies are 3.5 KHz and 15 KHz respectively ?
Answer
B. 11500 Hz
10
Reason for the slope of the output characteristics of a CB configuration to be lower than that of a CE configuration is
Answer
C. Early effect
11
What is the slew rate of IC 741 Op Amp with a bias current and internal frequency compensation capacitor ?
Answer
B. 0.73
12
In the case of an ideal operational amplifier, which of the following is
Answer
A. Input resistance = ∞, output resistance = 0, bandwidth = ∞
13
What is a Schmitt trigger ?
Answer
B. Comparator with positive feedback
14
Consider the following statements : A. MOSFET is a voltage controlled oscillator. B. BJT is slower than MOSFET. C. BJT has higher bandwidth than MOSFET. D. MOSFET has lesser thermal stability than BJT.
Answer
B. A, B and C are correct
15
What is the condition to create depletion channel in an n channel enhancement MOSFET ?
Answer
A. >
16
The effect of the channel length modulation in a MOSFET operating in saturation region causes
Answer
C. Decrease in output impedance
17
What is the unity gain bandwidth of an n-channel MOSFET with following parameters with a bias of ? = 0.25 mA/ = 1V λ=0
Answer
D. 909 MHz
18
Find the cutoff frequency f_c for an operational amplifier having a specific signal bandwidth of 2 MHz and closed-loop gain A_CL = 250 V/mV.
Answer
B. 4 Hz
19
What is the maximum closed loop voltage gain, when the input signal varies by 0.1 volt in 10 microseconds with a slew rate SR = 3 V/ μS ?
Answer
C. 300
20
What is the value of current in the following figure
Answer
C. 1 mA
21
An operational non inverting amplifier circuit in which all of the output voltage is fed back to the inverting input is called
Answer
C. Voltage follower
22
Identify the true statement if a BJT transistor is operating in saturation mode.
Answer
A. CB and BE junction are forward biased
23
Which of the following are true regarding clamper ? A. A positive clamper adds a positive DC voltage B. Clamper can also be called as a re-inserter C. To reduce tilt, reduce the RC value D. Negative clamper will clamp the positive peak of output to the reference voltage
Answer
C. A, B and D
24
In a 2-input summing amplifier with an ideal op-amp, R₁ = 1 kΩ, R₂ = 5 kΩ, R_F = 2 kΩ, V₁ = 2 V, V₂ = 3 V and V_CC = ±10 V.
Answer
B. –5.2 V
25
For a MOSFET in saturation the effective channel length decreases with increase in
Answer
A. Drain voltage
26
What is we output voltage when the input is 7 volt and zener breakdown voltage of the zener diode is 10 V.
Answer
C. 0 V
27
What is the AC ripple at the output of a half a rectifier with an AC supply of 50 Hz ?
Answer
B. 50 Hz
28
At room temperature the band gap of germanium is
Answer
C. 0.7 eV
29
What happens when the forward current to an LED is increased ?
Answer
C. Intensity of LED increases up to a certain maximum value and after that starts decreasing
30
Which of the following are characteristics of an LED ? A. Fast response time B. Hi warm up time C. Long life D. Law energy consumption.
Answer
D. A, C and D
31
In the given circuit the battery voltage is varied between 8 to 12 volts and the zener breakdown voltage is 6 volts. What will be the maximum current through the zener diode ?
Answer
A. 1.5 mA
32
Calculate the number of columns per second if the area is 5 cm², recombination rate of holes is 1000 cm³/s and differential length is 2 mm.
Answer
B. 1.6×10⁻²²
33
What is the maximum potential a material can process if it has zero permittivity ?
Answer
A. 0
34
What type of semiconductor a solar cell belongs to ?
Answer
A. PN junction
35
What is the reverse current in a photo diode when there is no incident light ?
Answer
C. Dark current
36
The fractional number 0.3125 in decimal number system can be represented in binary number system as
Answer
A. (0.0101)₂
37
Representation of decimal number 498 in hexadecimal number system is
Answer
B. (1F2)₁₆
38
Let a binary function F(A, B, C, D) = Σ (0, 2, 5, 7, 8, 10, 13, 15). This binary function when reduced using a 4 variable K-Map will result in
Answer
D. BD + B′D′
39
Assume 3 inverters, each with propagation delay of 100 ns are connected in series and the output of the third inverter is connected to the first inverter. Assume there is no other external input. The output of the third inverter will have an approximate fundamental frequency of
Answer
D. 1.67 MHz
40
A JK flip-flop with J = 1, K = 1 has a clock signal with frequency of 10 KHz. The Q output is
Answer
C. 5 KHz square wave
41
A 4 bit asynchronous binary counter with negative edge triggered D flip-flops with propagation delay of 10 ns. What is the highest frequency allowed for the counter to operate reliably, avoiding timing issues caused by propagation delay ?
Answer
C. 25 MHz
42
A 12 bit Analog to Digital Converter (ADC) is used with a voltage range 0 to 5 volt. What is the possible value for voltage resolution ?
Answer
C. 1.22 milli volts
43
Maximum possible signal to Noise Ratio of an 8 bit ADC considering the effect of quantisation noise is
Answer
A. 49.8 dB
44
The conversion time of n bit flash type ADC with clock period T is
Answer
D. T
45
Example for a volatile memory is
Answer
A. RAM
46
Periodic refreshing is needed for
Answer
C. DRAM
47
An SRAM with address lines A0 to A15 and data lines D0 to D7 has a total capacity of
Answer
B. 64 KB
48
Von Neumann architecture is an example for
Answer
C. SISD
49
DSP processors generally follow
Answer
B. Harvard architecture
50
Regarding pipelined processing, select the wrong statement.
Answer
B. Execute stage of fixed-point instructions take more phases than that of a floating-point instruction
51
To access data from an address location stored in a register R and then to increment the register contents by a displacement d, we may use
Answer
C. *R++(d)
52
A shift register in which output Q of the last flipflop is connected to the input of the first flipflop is called
Answer
C. Ring counter
53
A 4-bit R/2R digital-to-analog (DAC) converter uses resistance values of 1K and 2K in the ladder network. Number of 1K resistances and 2K resistances needed for the ladder network is ________ and ________ respectively.
Answer
D. 3, 5
54
Finding the sample values in between the pulses with different amplitudes produced by a DAC is called
Answer
B. Interpolation
55
A multiplexer has 2 select lines S1 and S0 and 4 input lines A0, A1, A2, A3. Assume S1 and S0 are shorted and connected to a clock signal. Multiplexer will have an output Y switching between
Answer
B. A0 and A3
56
For a super-heterodyne receiver, which of the following is true ?
Answer
A. Converts RF to IF then demodulates
57
Consider 2x(t)cos(ω_c t) is a DSB received signal, with x(t) as the modulating signal having power P_M. What is the output power if the received signal is coherent demodulated and lowpass filtered?
Answer
D. P_M
58
A single Side Band (SSB) signal produced by a modulating signal A cos(ω_m t), with a carrier cos(ω_c t), is
Answer
D. A[cos(ω_m t)cos(ω_c t)−sin(ω_m t)sin(ω_c t)]
59
A signal, band limited to ω_m, is used to amplitude modulate a carrier. What is the carrier frequency if the bandwidth of the AM modulated signal is 2% of the carrier frequency?
Answer
C. 100ω_m
60
If the modulating signal has frequency 10 KHz, the phase modulated signal with a carrier of 1 MHz can be
Answer
B. B cos(2π10⁶t + A sin(2π10³t))
61
Given two band-limited signals (t) and (t) with band limits 3 KHz and 5 KHz respectively. What is the Nyquist rate for sampling the convolution of the signals, (t)* (t) ?
Answer
D. 6 KHz
62
What is the minimum sampling frequency for a band pass signal with upper limit 10 KHz and lower limit 6 KHz, as per the band pass sampling theorem ?
Answer
B. 10 KHz
63
For a full scale sinusoid with peak magnitude 5 volts, what is the signal to quantization noise power, with a quantization signal step-size 2, in PCM ?
Answer
A. 37.5
64
For a lossless channel, the channel matrix has
Answer
C. Only one non-zero element in each column
65
A source generates three symbols with probabilities 0.6, 0.2 and 0.2 at a rate of 4000 symbols per second. If the source is generating these symbols independently, what is the average bit rate of a most efficient source encoder ?
Answer
D. 5600 bps
66
What is the average information rate for a Discrete Memoryless Source (DMS) that emits four symbols with code-length 1, 2, 3 and 3 respectively, with probabilities ?
Answer
B. 1.6 bit/sym
67
Given a parity matrix, for a (6, 3) hamming code. What is the systematic linear-block code generated for the message [0 1 1] ?
Answer
C. [0 1 1 1 1 0]
68
If a 16-QAM Gray-coded constellation, with signal set {±1, ±3}, maps data [0 0 0 0 ] to symbol {–3 + j3}; then, the symbol for [1 1 0 0] can be
Answer
D. {1 + j3}
69
The bit rate of a digital communication system is R kbits/s. The modulation used is 64-QAM. The minimum bandwidth required for ISI free transmission is
Answer
B. R/6 KHz
70
Which one of the following statements about Differential Pulse Code Modulation (DPCM) is True ?
Answer
C. The difference of message signal with its prediction is quantized
71
Given, sampling frequency 30 KHz and Bandwidth 3 KHz. Which step size will minimize slope-overload error for Delta Modulation system with a normalized sinusoid as input ?
Answer
A. Δ ≥ 0.2
72
In the following pairs of OSI protocol layer/sub-layer and its functionality, the INCORRECT pair is
Answer
C. Application layer and multi-access
73
In a token-ring network, the transmission bit rate is 10 Mbps at a propagation speed on cable 200 m/μS. Here, 2-bit delay is equivalent to
Answer
B. 40 m of the cable
74
A binary PSK system has a bit rate of 1 Mbps. If the received waveforms, , are coherently detected by a matched filter, what is the probability of error, given that the channel's one sided noise power spectral density is W/Hz ?
Answer
D. Q
75
If the internal capacitor of an op-amp is 20 pF and the maximum current to charge the capacitor is 10 μA, what is the slew-rate ?
Answer
A. 0.5 V/μS
76
What is the value of the output voltage V₀, with input at where a is a constant and t is time?
Answer
C. −2a(10⁻³+t)
77
The value of Vo ?
Answer
B. 2 V
78
The limitation of a 3-terminal monolithic voltage regulator is
Answer
D. Output voltage is fixed
79
Which of the following is a frequency response of a first order active low-pass filter, with R_f and R₁ deciding the gain while R and C decide the band of functioning?
Answer
C. (1+R_f/R₁)/(1+jωRC)
80
The Q-factor of a bandpass filter with f_U and f_L as the upper and lower cut-off frequency, respectively, is
Answer
B. √(f_U f_L)/(f_U−f_L)
81
What value of R₂ gives output voltage V₂ = 7.5 V? The IC 7805 gives a regulated 5 V output, quiescent current I_Q = 4.2 mA, and 25 mA is designed through the 200 Ω resistor.
Answer
A. ≈ 85 Ω
82
The advantage of using a dual slope ADC in a digital voltmeter is
Answer
C. Accuracy is high
83
The number of comparators in 4-bit flash ADC is
Answer
A. 15
84
The resolution of a 4-bit counting ADC is 0.5 Volts. For an analog input of 7.3 Volts, the digital output of the ADC will be
Answer
B. 1111
85
A fixed-duty cycle DC-DC boost converter with a 100 W rating draws 10A from the input DC supply when powering a 100W, 25V DC load. What is the required input DC supply rating for proper operation when the converter is used to power a 30V DC load that draws 2A ?
Answer
C. 12V, 5A
86
A single-phase to single-phase cycloconverter is used to control a 240V, 60Hz single-phase induction motor with V/f control. The cycloconverter has an input AC of 300V. If the motor is running at half of its rated speed with a power factor of 0.75, what is the AC input power factor of the cycloconverter ?
Answer
C. 0.30
87
Which statement accurately describes a MOSFET ?
Answer
C. MOSFET is an ON and OFF controlled device
88
A step-down chopper is used for speed control of a DC motor. If the turn-on time of the MOSFET is decreased by 20% un-altering the switching frequency, what will be the new average output voltage compared to the previous average output voltage ?
Answer
B. 0.8 times
89
A 120 degree voltage source inverter is used for speed control of an induction motor. Which of the following is more true about this control ?
Answer
B. V/f control is possible if a step-down chopper is added at its front end
90
A boost converter is used to convert 50V DC to 150V DC. The PWM gate signal for this converter is fed from a microcontroller having 3.3V as its DC supply. What is the DC average value of this gate signal ?
Answer
B. 2.2 V
91
Which of the following is not a common type of stepper motor drive ?
Answer
D. Dual-phase drive
92
A 12V Zener diode regulator has a power dissipation in Zener diode and series resistor as 6W and 16W respectively. If the load current is 1.5 A, what is the duty cycle of a SMPS based buck regulator which replaces this Zener regulator ?
Answer
B. 0.6
93
What will be the peak value of a PWM controlled voltage source inverter fed from a dc supply of voltage, V ?
Answer
C. V
94
In a boost converter, if the output voltage is thrice the input voltage, what is the duty cycle of the switch ?
Answer
D. 66.6%
95
A PWM signal has a frequency of 10 KHz and a duty cycle of 60%. What is the on-time of the signal ?
Answer
B. 60 μs
96
What is the difference between a buck converter and a step down chopper ?
Answer
C. Buck converter is a step down chopper with a low pass filter
97
Which of the following is not a type of stepper motor ?
Answer
D. Brushless DC Stepper Motor
98
What is the frequency of the output voltage of a voltage source inverter (VSI) if the input voltage is 480 V, the modulation index is 0.8, and the carrier frequency is 6 KHz ?
Answer
C. 6 KHz
99
A DC separately excited motor is fed from a step down chopper such that motor runs at rated speed and torque producing a back emf of magnitude having half of chopper supply voltage when duty cycle is 80%. Find the duty cycle for obtaining half rated speed at rated torque.
Answer
D. 55%
100
A signal b cos(at) is used amplitude modulated. The transmitted signal can be
Answer
B. b cos(at) cos(2πf_c t + φ)
Discussion
Ask a doubt or share a tip.
No comments yet — start the discussion.